Before the advent of large AI models, the concept of edge AI already existed in the industry. As AI functionalities become more powerful, integrating AI into MCUs to achieve edge-side single-chip solutions has become a new trend.

However, adding AI/ML capabilities to low-power MCUs without significantly increasing power consumption is a major challenge. Several solutions are available, including those related to algorithms and hardware.

Models running on MCUs differ from those on GPUs, typically using TinyML. TinyML is a subset of machine learning with power consumption in the milliwatt range. TinyML workloads are very simple, requiring much less memory and processing power than advanced AI like facial recognition, often sacrificing image processing quality for lower power consumption. Generally, small-scale algorithms can be handled by the MCU’s DSP or floating-point unit (FPU) without much optimization in efficiency.

To run TinyML, Arm introduced processor cores specifically designed for this task, such as the Arm Cortex-M55, which uses Arm’s Helium technology to perform arithmetic operations in parallel, achieving GPU-like operations on a smaller scale. Thus, the Cortex-M55 is better at handling AI workloads than typical cores but still increases power consumption.

When MCUs need to run larger AI algorithms, many manufacturers add NPUs to the hardware to enhance AI/ML performance. For example, Arm’s Ethos-U microNPU significantly improves Cortex-M core performance, serving as an AI/ML accelerator for embedded IoT devices, allowing AI/ML computations to run directly on this new microNPU architecture, far more efficient than Cortex-M MCUs.

AI-enabled MCU products have exploded in the past two years.

NXP was an early adopter of NPUs in MCUs, launching the MCX N microcontroller series in 2022. This platform combines the strengths of LPC and Kinetis general-purpose MCUs with an NXP-developed hardware NPU to accelerate edge AI computations. The NPU acts as an AI computation coprocessor for the CPU with dedicated computational channels.

ST has also targeted NPUs, launching the first general-purpose MCU with an in-house NPU hardware processing unit, the STM32N6, in 2022, with a computing power of 0.6 TOPS. It also integrates new IP and video peripherals, such as MIPI CSI cameras, machine vision image signal processors (ISPs), H.264 video encoders, and Gigabit Ethernet controllers supporting Time-Sensitive Networking (TSN) endpoints.

Infineon’s latest products support the Arm Helium DSP instruction set and the Arm Ethos-U55 NPU. The newly launched PSoC Edge MCU series includes the E81, E83, and E84, featuring Helium and NPU along with Infineon’s ultra-low-power NNLite hardware accelerator for neural network acceleration.

Renesas achieves performance with powerful cores. Its new RA8 series MCUs use the Arm Cortex-M85 core based on the Arm v8.1M architecture with a 7-stage superscalar pipeline, providing additional acceleration for computationally intensive neural network or signal processing tasks. The Cortex-M85, equipped with Helium (Arm M-Profile Vector Extension), is the highest performing Cortex-M core.

ADI has focused on edge AI since 2020, integrating CNN accelerators directly into MCUs. For instance, its ultra-low-power AI MCU MAX78000, launched in 2023, features a built-in hardware CNN, dual microcores, memory, SIMO, and multiple communication interfaces, enabling AI inference at very low energy levels.